The present invention relates to a semiconductor package in which after respective stamps are put in block, singulation is conducted by dicing, and a method of manufacturing the semiconductor package.
In recent years, portable information communication devices including cellular phones are commercialized in very short development cycles such that new products are released several times a year for the purpose of increasing multiple functions or downsizing the device. With this short development cycles, a demand to downsize the semiconductor package mounted in the portable information communication device goes on increasing.
One of ultimately downsized semiconductor packages is a wafer level semiconductor package represented by a wafer level chip size package. In a process of assembling the package, after the wafer is stamped in block, the wafer is divided and singulated into respective packages.
For example, Japanese Unexamined Patent Application Publication No. 2002-26045 discloses the invention pertained to a wafer level semiconductor package in which after a rear surface of the wafer has been stamped for each chip, the wafer is divided by dicing into the respective chips, and then assembled, and a method of stamping the package.
FIGS. 7A to 7E are diagrams of a process of manufacturing a wafer level semiconductor package according to Japanese Unexamined Patent Application Publication No. 2002-26045.
In a wafer level semiconductor package in which a Cu post terminal side is sealed with a resin as illustrated in FIG. 7A, position information 2 is stamped on a wafer surface opposite to a terminal surface 3 as illustrated in FIG. 7B. Then, as illustrated in FIG. 7C, probe pins 5 are brought into contact with the respective terminals 4 to conduct an electric test on the respective chips at the wafer level. Thereafter, as illustrated in FIG. 7D, results of the electric test are stamped in the respective chip region of the wafer rear surface. Finally, as illustrated in FIG. 7E, the wafer is diced into the respective chips by a dicing saw to produce individual semiconductor packages.
On the other hand, Japanese Unexamined Patent Application Publication No. Hei05(1993)-267482 discloses the invention in which multiple bar code marks are stamped on an upper surface of the package.
FIG. 10 illustrates a semiconductor device according to
Japanese Unexamined Patent Application Publication No. Hei05(1993)-267482.
In the semiconductor package illustrated in FIG. 10, bar code marks 17 and 18 are provided on multiple portions 19 and 20 of a package 15, spaced from each other, and read by a bar code reader as positioning references for mounting, thereby enabling positioning for mounting.
The stamp information is roughly classified into indication used for confirming a product name on a client side, and a lot management traceability indication for a semiconductor manufacturer. The latter indication is intended for the internal management, and therefore may be thus stamped with the bar codes.